1. Field of the Invention
The present invention relates to method for forming conductive line of semiconductor device, and in particular to an improved method for forming conductive line of semiconductor device which provides improved contact resistance characteristics.
2. Description of the Background Art
A bit line structure, which is a data I/O path of semiconductor device, comprises a polycide structure consisting of a polysilicon layer and a tungsten silicide layer. In case of a highly integrated and high-speed semiconductor device, a tungsten bit line having low resistance is used instead since this structure has a limitation due to high sheet resistance.
Resistance stabilization is required for the tungsten bit lone because the contact resistance varies by the subsequent thermal processes.
Generally, the contact resistance is greatly increased during a subsequent thermal process in a P+ region where a thick Ti film is formed due to loss of dopants in a source/drain region. Therefore, a bit line comprising a relatively thin Ti film is used.
However, although the thin Ti film stabilizes the contact resistance of P+ region, contact resistances of N+ region and tungsten silicide layer of gate electrode are largely increased.
Therefore, the thickness of the Ti film is adjusted so that the contact resistances of P+ region and N+ region and gate region have moderate values.
However, as the contact area becomes smaller, the contact resistance, especially the contact resistance of gate electrode, is drastically increased as illustrated in FIG. 1. The thickness of the Ti film must be increased to reduce the contact resistance. However, increase in the thickness of the Ti film increase the contact resistance of P+ region as described above, resulting in a degradation of device characteristic.